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CISA Loses Another Senior Exec

3 weeks ago
An anonymous reader quotes a report from The Register: The US Cybersecurity and Infrastructure Security Agency has lost another senior leader: executive director Bridget Bean departed on Wednesday. Bean, who served as the de facto agency boss for five months between former CISA director Jen Easterly's departure in January and Madhu Gottumukkala's appointment to the deputy director post last month, said she was "officially retiring from Federal service once again" in a LinkedIn post. "My time at CISA has been truly remarkable," she wrote. "Having had the privilege to serve as the Senior Official Performing the Duties of Director of CISA for 5 months has been a profound honor." CISA's executive leadership page now lists Gottumukkala as its acting director, and the agency remains without a Senate-confirmed leader. President Trump nominated Sean Plankey to serve as the agency's director, and his nomination is scheduled for consideration (PDF) by the Senate's Homeland Security and Governmental Affairs Committee today. However, his appointment still requires a full Senate vote. Senator Ron Wyden (D-OR) has said he will continue to block Plankey's confirmation until CISA releases an unclassified report on American telecommunications networks' weak security. At the time of her departure, Bean had spent three and a half years with CISA and more than three decades with the federal government, including a job as the Federal Emergency Management Agency's third-ranking official. Before accepting the executive director post, she was CISA's first chief integration officer. In this position, she "led the integration of the agency's operations and ensured CISA's frontline of regional staff seamlessly supported the critical infrastructure that Americans rely on every hour of every day," according to her bio on the agency's website. [...] Bean's retirement comes during a talent exodus from CISA -- and other federal government agencies -- with some folks getting fired and others taking the Trump administration's buyout offer to resign from public service. As of May 30, the heads of five of CISA's six operational divisions and six of its 10 regional offices had left the agency, and around 1,000 people, nearly one-third of its total staff, have reportedly left CISA since Trump took office.

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PCI Express 7.0 Specs Released

3 weeks ago
The PCI-SIG, which oversees the development of the PCIe specification, has officially released the final spec for PCI Express 7.0. "The PCIe 7.0 specification increases the per-lane data transfer rate to 128 GT/s in each direction, which is twice as fast as PCIe 6.0 supports and four times faster than PCIe 5.0," reports Tom's Hardware. "Such a significant performance increase enables devices with 16 PCIe 7.0 lanes to transfer up to 256 GB/s in each direction, not accounting for protocol overhead. The new version of the interface continues to use PAM4 signaling while maintaining the 1b/1b FLIT encoding method first introduced in PCIe 6.0." From the report: To achieve PCIe 7.0's 128 GT/s record data transfer rate, developers of PCIe 7.0 had to increase the physical signaling rate to 32 GHz or beyond. Keep in mind that both PCIe 5.0 and 6.0 use a physical signaling rate of 16 GHz to enable 32 GT/s using NRZ signaling and 64 GT/s using PAM4 signaling (which allows transfers of two bits per symbol). With PCIe 7.0, developers had to boost the physical frequency for the first time since 2017, which required tremendous work at various levels, as maintaining signal integrity at 32 GHz over long distances using copper wires is extremely challenging. Beyond raw throughput, the update also offers improved power efficiency and stronger support for longer or more complex electrical channels, particularly when using a cabling solution, to cater to the needs of next-generation data center-grade bandwidth-hungry applications, such as 800G Ethernet, Ultra Ethernet, and quantum computing, among others. [...] With the PCIe 7.0 standard officially released, members of the PCI-SIG, including AMD, Intel, and Nvidia, can begin finalizing the development of their platforms that support the PCIe specifications. PCI-SIG plans to start preliminary compliance tests in 2027, with official interoperability tests scheduled for 2028. Therefore, expect actual PCIe 7.0 devices and platforms on the market sometime in 2028 - 2029, if everything goes as planned. PCI-SIG also announced that pathfinding for PCIe 8.0 is underway, and members of the organization are actively exploring possibilities and defining capabilities of a standard that they are going to use in 2030 and beyond. "Interestingly, when asked whether PCIe 8.0 would double data transfer rate to 256 GT/s in each direction (and therefore enable bandwidth of 1 TB/s in both directions using 16 lanes), Al Yanes, president of PCI-SIG, said that while this is an intention, he would not like to make any definitive claims," reports Tom's Hardware. "Additionally, he stated that PCI-SIG is looking forward to enabling PCIe 8.0, which will offer higher performance over copper wires in addition to optical interconnects."

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